MCST-R2000
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| General information | |
|---|---|
| Launched | 2018 |
| Designed by | MCST |
| Common manufacturer | |
| Performance | |
| Max. CPU clock rate | 2 GHz |
| Architecture and classification | |
| Instruction set | SPARC V9 |
| Physical specifications | |
| Cores |
|
| History | |
| Predecessor | MCST-R1000 |
The MCST R2000, (e90), (Russian: МЦСТ R2000) is a 64-bit microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC.[1][2]
MCST R2000 Highlights
[edit | edit source]- implements the SPARC V9 instruction set architecture (ISA)
- octa-core
- core specifications:
- out-of-order, dual-issue superscalar[3]
- two integer units
- one floating-point unit
- out-of-order, dual-issue superscalar[3]
- integrated memory controller
- integrated ccNUMA controller
- 2 GHz clock rate
- 28 nm process
- ~500 million transistors
References
[edit | edit source]- ^ Lua error in Module:Citation/CS1/Configuration at line 2172: attempt to index field '?' (a nil value).
- ^ Lua error in Module:Citation/CS1/Configuration at line 2172: attempt to index field '?' (a nil value).
- ^ Lua error in Module:Citation/CS1/Configuration at line 2172: attempt to index field '?' (a nil value).