KOMDIV-64

KOMDIV-64

General information
Launched	2007 (2007)
Designed by	NIISI
Performance
Max. CPU clock rate	200 MHz to 1.3 GHz
Architecture and classification
Technology node	28 nm to 0.35 μm
Instruction set	MIPS IV
Physical specifications
Cores	1 to 2

The KOMDIV-64 (Russian: КОМДИВ-64) is a family of 64-bit microprocessors developed by the Scientific Research Institute of System Development (NIISI) of the Russian Academy of Sciences and manufactured by TSMC, UMC, GlobalFoundries, and X-Fab. The KOMDIV-64 processors are primarily intended for industrial and high-performance computing applications.

These microprocessors implement the MIPS IV instruction set architecture (ISA).

Overview

Designation		Cores	In production since	Process (nm)	Clock rate (MHz)	Remarks / References
Russian	English
1990ВМ3Т	1990VM3T	1	2005	350	120
1890ВМ5Ф	1890VM5F	1	2008	350	350
1890ВМ6Я	1890VM6Ya	1	2011	180	270
1890ВМ7Я	1890VM7Ya	1	2011	180	200
1890ВМ8Я	1890VM8Ya	2	2016	65	800
1890ВМ9Я	1890VM9Ya	2	2016	65	750
1890ВМ108	1890VM108	1	2021	65	800
1890ВМ118	1890VM118	2	2019	28	1300
1890ВМ128	1890VM128	1	2019	65	800
1907BM028	1907VM028	1	2016	250	150	rad-hard
К5500ВК018	K5500VK018	1	2021	65	300

Nomenclature

Many microprocessors listed here are following version 2000 of the soviet integrated circuit designation.

Details

1990VM3T

• 0.35 μm CMOS process
• 240-pin QFP

1890VM5F

• 0.35 μm CMOS process
• 16 KB L1 instruction cache, 16 KB L1 data cache, 256 KB L2 cache
• in-order, dual-issue superscalar; 5-stage integer pipeline, 7-stage floating point pipeline
• 26.6 million transistors
• compatible with PMC-Sierra RM7000
• performance: 0.68 dhrystones/MHz, 1.03 whetstones/MHz, 1.09 coremarks/MHz

1890VM6Ya

• 0.18 μm CMOS process
• 16 KB L1 instruction cache, 16 KB L1 data cache, 256 KB L2 cache
• 680-pin BGA
• System-on-a-chip (SoC) including a PCI controller, 5 64-bit timers, RapidIO, Ethernet 100/10 Mbit/s, USB 2.0, I²C
• performance: 0.90 dhrystones/MHz, 1.32 whetstones/MHz, 1.47 coremarks/MHz

1890VM7Ya

• 0.18 μm CMOS process
• 16 KB L1 instruction cache, 16 KB L1 data cache, 32 KB general-purpose SRAM
• 680-pin BGA
• System-on-a-chip (SoC) including a PCI controller, 3 64-bit timers, RapidIO, I²C, SPI, 128-bit DSP with 4 cores and 64 KB RAM per core

1890VM8Ya

• 65 nm CMOS process; manufactured at TSMC
• 32 KB L1 instruction cache, 16 KB L1 data cache, 512 KB L2 cache
• 1294-pin BGA
• System-on-a-chip (SoC) including a PCI controller, 5 64-bit timers, RapidIO, Ethernet 1000/100/10 Mbit/s, USB 2.0, I²C, SPI, SATA 3.0

1890VM9Ya

• 65 nm CMOS process; manufactured at TSMC
• 1294-pin BGA
• System-on-a-chip (SoC) including RapidIO, Ethernet 1000 Mbit/s, USB 2.0, SATA 3.0
• power consumption 12 W, temperature range -60 °C to +85 °C

1890VM108

• 65 nm CMOS process; manufactured at TSMC
• 32 KB L1 instruction cache, 16 KB L1 data cache, 512 KB L2 cache
• System-on-a-chip (SoC) including a PCI controller, Ethernet 1000/100/10 Mbit/s, USB 2.0, I²C, SPI, CAN 2.0, SATA 3.0
• power consumption 7 W, temperature range -60 °C to +85 °C

1890VM118

• 28 nm CMOS process; manufactured at TSMC
• System-on-a-chip (SoC) including a PCI controller, Ethernet 1000/100/10 Mbit/s, USB 2.0, I²C, SPI, CAN 2.0, SATA 3.0, graphics co-processor
• power consumption 9 W, temperature range -60 °C to +85 °C

1890VM128

• 65 nm CMOS process; manufactured at TSMC
• System-on-a-chip (SoC) including a PCI controller, Ethernet 1000/100/10 Mbit/s, USB 2.0, I²C, SPI, graphics co-processor
• power consumption 20 W, temperature range -60 °C to +85 °C

1907VM028

• 0.25 μm silicon on insulator (SOI) CMOS process; manufacturing to be moved to Mikron Group
• 128 KB L2 cache
• 675-pin BGA
• System-on-a-chip (SoC) including RapidIO, Ethernet, PCI, I²C

K5500VK018

• 65 nm CMOS process; contains only Russian IP blocks
• 128 KB L2 cache
• 265-pin BGA
• System-on-a-chip (SoC) including Ethernet 100/10 Mbit/s, USB 2.0, I²C, SPI, CAN 2.0, SDIO, 8-channel ADC, 4-channel DAC, RTC
• power consumption 0.5 W, temperature range -40 °C to +85 °C

See also

• KOMDIV-32