3 μm process
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 | This article needs additional citations for verification. (February 2014) |
| Semiconductor device fabrication |
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| File:4-fach-NAND-C10.JPG |
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MOSFET scaling (process nodes) |
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Future
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The 3 μm process (3 micrometer process) is the level of MOSFET semiconductor process technology that was reached around 1977,[1][2] by companies such as Intel.
The 3 μm process refers to the minimum size that could be reliably produced. The smallest transistors and other circuit elements on a chip made with this process were around 3 micrometers wide.
Products featuring 3 μm manufacturing process
[edit | edit source]- Intel's 8085, 8086, 8088 CPU's launched in 1976, 1978, 1979, respectively, were manufactured using its 3.2 μm NMOS (HMOS) process.[1] [failed verification].[3][dubious – discuss]
- Hitachi's 4 kbit HM6147 SRAM memory chip, launched in 1978, introduced the twin-well CMOS process, at 3 μm.[4]
- Motorola 68000 (MC68000) CPU, launched in 1979, was originally fabricated using an HMOS process with a 3.5 μm feature size.[5][circular reference]
- The ARM1 was launched in 1985 and manufactured on a 3 μm process.[6]
References
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- ^ Lua error in Module:Citation/CS1/Configuration at line 2172: attempt to index field '?' (a nil value).
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- ^ Motorola 68000
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| Preceded by 6 μm process |
MOSFET semiconductor device fabrication process | Succeeded by 1.5 μm process |
