RH-32
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This article relies largely or entirely on a single source. (May 2015) |
The RH-32 was a radiation-hardened 32-bit MIPS R3000 based microprocessor chipset developed by the USAF Rome Laboratories[1] for the Ballistic Missile Defense Agency, and produced by Honeywell (later, TRW) for Aerospace applications. It achieves a throughput of 20 MIPS. It was a three-chip set, consisting of Central Processing Unit, Floating Point Unit, and Cache Memory.[2]
References
[edit | edit source]- ^ Schechter, Joanne. "Will commercial strategy deliver cost, time savings? (military microprocessors)(includes related article on SGS-Thomson's new transputers)." EDN. Canon Communications L.L.C. 1991. http://www.highbeam.com/doc/1G1-11230801.html Archived 2015-09-24 at the Wayback Machine
- ^ Lua error in Module:Citation/CS1/Configuration at line 2172: attempt to index field '?' (a nil value).
