File:Tesla Dojo supercomputer tile.jpg
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Size of this preview: 763 × 599 pixels. Other resolutions: 306 × 240 pixels | 611 × 480 pixels | 978 × 768 pixels | 1,280 × 1,005 pixels | 2,560 × 2,011 pixels | 3,429 × 2,693 pixels.
Original file (3,429 × 2,693 pixels, file size: 6.03 MB, MIME type: image/jpeg)
Summary
| Description |
English: This one tile can do 9 quadrillion floating point calculations per second, optimized for AI training. I saw it up close today. Each 15kW tile holds a 5x5 array of blocks, each with 12 D1 multi-chip-module stacks, with RF shielding between them. These are custom AI chips by Tesla, with 362 teraFLOPS per block. Connectors around the perimeter provide 36Tb/s of inter-tile bandwidth. The Dojo ExaPod supercomputer has 120 of these tiles, for 1.1 exaFLOPS of AI-optimized compute. |
| Date | |
| Source | https://www.flickr.com/photos/jurvetson/53391348103/ |
| Author | Steve Jurvetson |
Licensing
This file is licensed under the Creative Commons Attribution 2.0 Generic license.
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This image was originally posted to Flickr by jurvetson at https://flickr.com/photos/44124348109@N01/53391348103. It was reviewed on 12 December 2023 by FlickreviewR 2 and was confirmed to be licensed under the terms of the cc-by-2.0. |
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 17:44, 12 December 2023 | | 3,429 × 2,693 (6.03 MB) | wikimediacommons>Sv1xv | Uploaded a work by Steve Jurvetson from https://www.flickr.com/photos/jurvetson/53391348103/ with UploadWizard |
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